Presentation by Dr. Mitsu Koyanagi

Tohoku University, Japan

Wednesday, November 3rd - 12:30 to 2:00pm
Engineering 2, Room #215
Three-Dimensional Integration Technology and Super Chip

Biography
Mitsu Koyanagi received the B.S. degree from Dept. of Electrical Engineering, Muroran Institute of Technology, Japan in 1969 and the M.S. and Ph.D. degrees from Dept. of Electronic Engineering, Tohoku University in 1971 and 1974, respectively. He joined the Central Research Laboratory, Hitachi Co. Ltd. in 1974 where he had engaged in the research and development of DRAM and ASIC process and device technologies and invented a Stacked Capacitor DRAM memory cell which has been widely used in the DRAM production. In 1985, he joined Xerox Palo Alto Research Center, California where he was responsible for the research of submicron CMOS devices, poly-Si TFT devices and analog/digital sensor LSI design. He became a professor in Research Center for Integrated Systems, Hiroshima University, Japan where he engaged in the research of sub-0.1um device fabrication and characterization, device modeling, optical interconnection and parallel computer system. Since 1994, he has been a processor in Intelligent System Design Lab., Dept. of Machine Intelligent and Systems Engineering, and currently Dept. of Bioengineering and Robotics, Graduate School of Engineering, Tohoku University, Japan where his current interests are three-dimensional integration technology, optical interconnection, nano-devices, memory devices, low voltage and low power integrated circuits, new intelligent memory for parallel processor system, parallel computer system specific for scientific computation, real-time image processing system and artificial retina chip, bio-chip, brain-like computer system. He was a director of Venture Business Laboratory, Tohoku University from 1998 (May) to 2000 (May). He was awarded IEEE Cledo Brunetti Award in 1996 and Award of Ministry of Education, Culture, Sports, Science and Technology in 2002 in addition to Ohkouchi Prize in 1992, SSDM (Solid-State Devices and Materials Conf.) Award in 1994 and Opto-Electronic Integration Technology Award (Izuo Hayashi Award) in 2004. He has been an IEEE fellow since 1997. He has published more than 200 papers and is the author or the co-authors of several books such as "Physics of VLSI devices", "Submicron Devices I & II" etc.